TCP/IP Controller with Flexible I/O
The system is powered by a 25 MHz Intel 386Ex processor with 512k bytes of SRAM, and 512k bytes of Flash memory. The board is equipped with two PC compatible RS-232 serial ports. One of these ports is software configurable as RS-485. The boardalso features 46 digital I/O lines, a hardware clock/calendar and processor expansion bus. Ethernet connectivity is supported by an NE2000 compatible controller with 16k bytes of on-chip buffer memory and 10BASE-T media interface. The device is compatible with the M-Systems DiskOnChip product, offering non-volatile mass storage options from 2 to 144 megabytes.
The majority of the I/O is provided through a Xilinx CPLD. In its standard configuration, the CPLD is programmed as a simple port I/O unit. In-circuit programability allows a user to implement custom logic designs to more closely match a given application. Development support for the board includes WATTCP TCP/IP stack libraries and the Borland C/C++ integrated development environment. The device is compatible with JK microsystems 40pin bus and Multi-I/O bus expansion cards. Matrix keypad and character LCD drivers are also provided. Source code for a web server along with other TCP/IP services and example code is included in the development kit.
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