MTC1224B
• 1 to 16 demultiplexer (DMUX)
• Integrated clock and data recovery (CDR)
• Low Jitter VCO with external control loop
• High sensitivity data inputs
• 100 pin thermally enhanced plastic package
Applications
• Telecom transmission systems
• SONET OC-192 and SDH STM-64 equipment with Forward Error Correction (FEC)
Description
The MTC1224B is a 10.664 Gb/s 1 to 16 demultiplexer (DMUX) with integrated clock and data recovery for use in SONET OC-192, SDH STM-64, and proprietary system applications. The monolithic IC is fabricated using a GaAs HBT process with an ft of 45 GHz to minimize power dissipation. In a typical application, the demultiplexer accepts a 10.664 Gb/s data stream from a high speed fiberoptic network and converts it into 16 differential outputs at 666.5 Mb/s.
The on-chip Phase Detector, Frequency Window Detector, and precision Voltage Controlled Oscillator (VCO) are used in combination with an external op-amp control loop to derive a low jitter 10.664 GHz clock from the incoming data. This clock is divided by 16 to generate the outgoing 666.5 MHz clock. The 666.5 Mb/s data channels are time-aligned to the 666.5 MHz clock to provide 16 low jitter synchronous outputs.
The MTC1224B's high sensitivity data inputs ensure accurate data recovery for signal amplitudes as low as 20 mVpp . A Loss Of Signal (LOS) detector indicates when the input signal is no longer sufficient to achieve an acceptable bit error ratio (BER).
All data and clock I/O are provided with on-chip termination to minimize external component count. The MTC1224B is provided in a 100 pin thermally enhanced plastic quad flat pack (QFP) and can be operated from either a single -5.2 V power supply or multiple supplies for reduced power consumption. The circuitry was designed for use in equipment which is required to comply with Bellcore, ANSI, and ITU-T international standards for SONET and SDH systems.
Multilink Technology Corporation, 300 Atrium Drive, Second Floor, Somerset, NJ 08873-4105. Tel: 732-537-3700; Fax: 732-805-9177.