Compiler Tool Kit for the 51LPC Microcontroller Family
The 51LPC architecture is based on the widely used 80C51 architecture, but offers designers a lower-power and small footprint solution. The 51LPC is housed in a very small package, complete with a UART, I2C interface, brown-out detection, and Analog to Digital converter—system-integration features that render it a low-system cost solution. The 51LPC family currently has five devices, all in a 20-pin package with code memory size from 2 to 4 kilobytes.
A reduced version of the Keil PK51 Version 6 tool chain, the PK51-LPC, is optimized for the 51LPC family with all of the components of Keil's µVision2 including the A51 Macro Assembler, C51 C-Compiler, and the BL51 Linker/Locator. The assembler and compiler both offer debug code generation for debugging with dScope or in-circuit emulators. The C51 C-compiler also featuresenhanced long arithmetic, C-based interrupt feature capabilities, full use of 80C51 register banks, complete symbol and type information for source-level debugging, and support of dual datapointers.
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