Synopsys Inc. announced at the London Embedded Systems Show that it will license its proven Eaglei model development and integration tools to leading intellectual property (IP) developers for the embedded processor market. The move is designed to dramatically expand access to the critical processor models essential for successful hardware/software co-verification by enabling the Intellectual Property (IP) developer -- in addition to the verification tool provider -- to create and distribute models early in the processor life-cycle, when they are most in demand.
The new Co-Verification ModelLink is based on the technology that has been used internally by Synopsys to develop complex processor models for hardware-software co-verification. Now, in addition to developing those models directly, Synopsys will provide the tools and training to enable IP providers to create and control the distribution of their models directly, while maintaining consistent model quality and interoperability. The tool is being used to develop models by a number of IP providers, including Hitachi and Motorola.
"We have seen a rapidly growing demand from our customers for accurate co-verification models of our most important cores," said Martin Gregory, program manager for modeling and co-simulation programs at Motorola global software division. "Synopsys' Co-Verification ModelLink allows us to efficiently integrate our core models with Synopsys Eaglei hardware-software co-verification tools. It fits in well with our approach of re-using as much IP as possible to create and support various model views of our complex processors."
The new tool integrates with existing modeling methods, minimizing the additional effort required of the IP provider. With ModelLink, optimized co-verification models can be derived from other model types -- including Instruction Set Simulators and Bus Functional models -- that the IP provider typically already offers their customers. The ModelLink toolkit consists of model shell generators, documentation, training and libraries. The resulting models interface to a wide range of supported HDL simulators through the Eaglei API.