New Microcontroller Architecture Supports Software/Hardware Design Reusability
Chandler, AZ-based Microchip Technology Inc. has introduced an 8-b RISC microcontroller architecture that delivers software and hardware design reusability to wireless design engineers. Using this new architecture, existing PICmicro 8-b RISC microcontroller users can migrate their designs to higher integration levels while maintaining their code investment, engineering knowledge, and hardware investment.
Targeted at wireless applications, the PIC18CXXX architecture offers up to 2 million bytes of program memory address space, a C compiler friendly development environment, and 10 MIPS performance at 40 MHz. In addition, this architecture supports 4 KB of data memory and additional instruction capabilities.
The new architecture combines the bit-manipulation instructions from the existing mid-range CPUs with the byte manipulation instructions from high-end CPUs. By doing this, the PIC18CXXX delivers a 16-b instruction and 8-b data arithmetic logic unit (ALU) architecture to users.
Microchip has also developed a new modulation emulation tool fore the PIC18CXXX architecture. This modulator technology features a two-chip design that enhances system validation and overall productivity.
Through the emulation tool, a combination of master/slave chips emulate the actual part. The master chip simulates the CPU and program memory access. The slave chip, on the other hand, emulates all of the peripherals.
First parts
Microchip has launched the first parts employing the PIC18CXXX architecture. The PIC18C242, PIC18C442, PIC18C252, and PIC18C452 are one-time-programmable (OTP) products that are specifically designed for embedded applications, such as wireless handset designs.
The PIC18C242 and PIC18C442 feature 8,192 x 16 bits of programmable memory, 512 B of user random-access memory (RAM). The PIC18C252 and PIC18C452, on the other hand, sport 16,384 x 16 bits of programmable memory and 1,536 B of RAM.
The PIC18C242 and PIC18C252 are available in 28-pin PDIP and SOIC packages while the PIC18C442 and PIC18C452 are offered in 40- and 44-pin PDIP, PLCC, and TQFP housings. Sample quantities are available for all four products. Volume production is slated for the fourth quarter of 1999. Pricing on the new microcontrollers ranges from $5.98 to $7.41.
C compiler
In addition to its first products, Microchip has unveiled a complete high-level language compiler for the PIC18CXXX architecture. The MPLAB-C18 C compiler generates re-locatable code that can be linked with PICmicro libraries, user-defined libraries, and re-locatable MPASM assembled objects. These libraries contain numerous processor-specific routines written for the PIC18CXXX architecture.
MPLAB-C18 is compatible with Microchip's current MPLAB compiler product. This allows the new tool to function with Microchip's current in-circuit emulator and simulator tools.
MPLAB-C18 runs on any PC computer running DOS 5.0 or later. The compiler comes complete with Windows-compatible MPLAB, and a set of PICmicro libraries. It is expected to be available in August for $495.
For more information on the PIC18CXXX architecture, the new OTP microcontrollers, or the new C compiler, contact Microchip at 480-786-7200.